This invention relates to systems for accessing compressed data in a flash memory system.
Solid-state drives, also referred to as SSDs, are data storage devices that make use of nand flash memory devices as storage elements. Typically such devices have a SSD controller that accepts host commands on one end and communicate to the nand flash on the other. Nand flash is a type of non-volatile storage device that retains data when powered off. The SSD controller accesses the nand flash device through the nand interface. Nand devices have a finite number of write/program cycles. The data write operation into the nand flash includes two phases. The data transfer phase and the memory program phase. Similarly, the data read is broken down into two phases. First the memory read phase and second the data transfer phase. The memory read phase introduces a very large delay (˜60 μs) for the controller as compared to the read out time for data.
The physical hierarchy of a nand flash die is broken down into planes, blocks, and pages. A nand flash die can contain multiple planes, each plane is divided into blocks and every block contains N pages. A typical nand will have 2 planes, ˜4K blocks and 256 pages per block.
As is readily apparent, the page is the smallest memory unit for read and write operations, i.e. a program or read operation is performed on a page. Typical nand page sizes are ˜4 KByte, ˜8 KByte, and ˜16 KByte. The page sizes may be slightly larger than 4 KByte, 8 KByte, or 16 KByte to accommodate the ECC parity data. The typical nand interface data rates can be 200 MBps to 400 MBps. For a read, the memory read time will be ˜60 μs and data transfer out would be ˜40 μs for ˜16 KB data, ˜20 μs for 8 KB data and ˜10 μs for 4 KB.
Logical block addressing (LBA) is a common scheme used for specifying the location of blocks of data stored on computer storage devices, generally systems such as hard drives and SSDs (see, e.g., http://en.wikipedia.org/wiki/Computer_storage).
Typical host LBA granularity is 512 bytes and 4 KB in SSD aware hosts. The SSD controller can choose to operate on 4 KBytes and manages the mapping between the 512 byte host LBA number and the 4 KByte controller LBA number. Each LBA in the system needs to be mapped to unique data units. The size of this data unit defines how large the physical address pointer is. As a result, the size of the LBA pointer would be a function of the number of dies, number of blocks, number of pages and size of data unit, depending on the size of the data unit in the page.
For example, in one example configuration an SSD is configured as follows:
Number of dies in the system: 128 dies=2^7
Number of blocks per die: 4 K+blocks=2^13
Number of pages per block: 256 pages=2^8
LBA data unit size: ˜4 KB
Number of 4 KB LBAs in 16 KB page: 4
Physical Device Capacity: 128*4K(+)*256*16 KB+=2^43
Logical Device Capacity: 128*4K*256*16 KB=2^41=2 TB
Number of LBA Locations in the Device: 2 TB/4 KB=2^29
Total Bits in one Entry of the LBA Table to point to physical Location=7 (For dies)+13 (For blocks)+8 (For pages)+2 (For 4 LBAs)=30 Bits
Total LBA Table size to store physical LBA location=30 bits*2^29 Entries=1.875 GBytes.
The LBA entry is usually rounded to byte granularity for each firmware management schema. As a result, 4 bytes are used for each LBA entry and total LBA table size becomes 4B*2^29 entries=2 GBytes. In this case, the 4 KB Host data is encoded and mapped as 4 KB data and parity bits into the nand flash.
The apparatus and methods disclosed herein provide an improved apparatus and methods for storing data in a nand flash SSD or other non-volatile storage device. The apparatus and methods disclosed both increase the amount of data that may be stored in an SSD and reduce the size of the LBA table used to access an SSD.